#include <kernel/semaphore.h>
Go to the source code of this file.
Data Structures | |||||||
struct | rtl8139 | ||||||
The RTL8139 device structure. More... | |||||||
struct | rxpacket | ||||||
A receive packet structure. More... | |||||||
struct | txpacket | ||||||
A transmitted packet structure. More... | |||||||
Defines | |||||||
#define | TX_FIFO_THRESH 256 | ||||||
Threshold is bytes transferred to chip before transmission starts (rounded down to 32 byte units). | |||||||
#define | RX_FIFO_THRESH 4 | ||||||
Rx buffer level before first PCI xfer. | |||||||
#define | RX_DMA_BURST 4 | ||||||
Maximum PCI burst, '4' is 256 bytes. | |||||||
#define | TX_DMA_BURST 4 | ||||||
Calculate as 16<<val. | |||||||
#define | NUM_TX_DESC 4 | ||||||
Number of Tx descriptor registers. | |||||||
#define | TX_BUF_SIZE 1536 | ||||||
Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). | |||||||
#define | RX_BUF_LEN_IDX 0 | ||||||
The receive buffer length code: 0, 1, 2 is allowed - 8, 16, 32KB. | |||||||
#define | RX_BUF_LEN (8192 << RX_BUF_LEN_IDX) | ||||||
The receive buffer length in bytes. | |||||||
#define | EE_SHIFT_CLK 0x04 | ||||||
EEPROM shift clock. | |||||||
#define | EE_CS 0x08 | ||||||
EEPROM chip select. | |||||||
#define | EE_DATA_WRITE 0x02 | ||||||
EEPROM chip data in. | |||||||
#define | EE_WRITE_0 0x00 | ||||||
EEPROM write 0. | |||||||
#define | EE_WRITE_1 0x02 | ||||||
EEPROM write 1. | |||||||
#define | EE_DATA_READ 0x01 | ||||||
EEPROM chip data out. | |||||||
#define | EE_ENB (0x80 | EE_CS) | ||||||
#define | eeprom_delay() in32(ee_addr) | ||||||
Delay between EEPROM clock transitions. No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. | |||||||
#define | EE_WRITE_CMD (5 << 6) | ||||||
EEPROM write command. | |||||||
#define | EE_READ_CMD (6 << 6) | ||||||
EEPROM read command. | |||||||
#define | EE_ERASE_CMD (7 << 6) | ||||||
EEPROM erase command. | |||||||
Typedefs | |||||||
typedef rxpacket | rxpacket_t | ||||||
A receive packet structure. | |||||||
typedef txpacket | txpacket_t | ||||||
A transmitted packet structure. | |||||||
typedef rtl8139 | rtl8139_t | ||||||
The RTL8139 device structure. | |||||||
Functions | |||||||
uint8_t * | get_eth_mac_addr () | ||||||
Get the MAC hardware address of the RTL8139 ethernet card.
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rtl8139_t * | get_rtl8139_device () | ||||||
Get the pointer of the RTL8139 device structure.
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int | send_rtl8139_packet (rtl8139_t *rtl, const void *data, size_t len) | ||||||
Send an ethernet packet to the physiscal layer.
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int | rtl8139_init (bool promisc) | ||||||
Initialize the RTL8139 driver.
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void | rtl8139_close (rtl8139_t **rtl) | ||||||
Halt the RTL8139 card and free the logical device.
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void | rtl8139_promisc (rtl8139_t *rtl, bool on) | ||||||
Enable/disable the promiscuous mode for the RTL8139 card.
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void | rtl8139_dump_info (rtl8139_t *rtl) | ||||||
Print the current RTL8139 card configuration on the console.
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void | rtl8139_handler () | ||||||
The RTL8139 interrupt handler routine. It is invoked every time that an ethernet packet is received or when a packet has been transmitted. |
How the RTL8139C controller works
Definition in file rtl8139.h.
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EEPROM chip select.
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EEPROM chip data out.
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EEPROM chip data in.
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EEPROM erase command.
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EEPROM read command.
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EEPROM shift clock.
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EEPROM write 0.
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EEPROM write 1.
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EEPROM write command.
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Delay between EEPROM clock transitions. No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
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Number of Tx descriptor registers.
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The receive buffer length in bytes.
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The receive buffer length code: 0, 1, 2 is allowed - 8, 16, 32KB.
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Maximum PCI burst, '4' is 256 bytes.
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Rx buffer level before first PCI xfer.
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Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4).
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Calculate as 16<<val.
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Threshold is bytes transferred to chip before transmission starts (rounded down to 32 byte units).
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